1. Field of the Invention
The present invention relates to a semiconductor time switch (an aging device) suitable for embedding in NAND flash memory device.
2. Description of the Related Art
A non-power semiconductor time switch (an aging device) that is interposed or connected between two functional blocks and disables mutual access between the two functional blocks after elapse of a predetermined time has been already disclosed in U.S. Pat. No. 7,224,157. Further, a technology of connecting a plurality of aging devices in parallel, in series, or in series-parallel to improve a lifetime accuracy of a time switch has been also disclosed in U.S. Pat. No. 7,075,284.
Although a basic form of the aging device is a transistor having a MOS structure, the aging device typically has a double gate structure having a floating gate and a control gate. Therefore, it is suitable for embedding in an electrically rewritable nonvolatile semiconductor memory (an EEPROM) likewise having a double gate structure.
On the other hand, in recent years, since a NAND flash memory can store a large amount of data, it is mainly used in the field of mobile devices. In the NAND flash memory, when embedding a conventional aging device is tried, since the aging device has a part that is not suitable for a manufacturing process specific to NAND, there is a problem that the aging device must be manufactured in a difference process.
Therefore, realization of an aging device that can be manufactured in the same process as the NAND flash memory and has a high lifetime accuracy has been demanded.